Publication
Power Modeling
One work has been evaluated as top-43% by IEEE/ACM MICRO 2024. Now it is submitted to IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems(TCAD).
Hardware Transaction Memory
- Wan L, Chao F, Li Q, et al. LockillerTM: Enhancing Performance Lower Bounds in Best-Effort Hardware Transactional Memory[C]//2024 IEEE International Parallel and Distributed Processing Symposium (IPDPS). IEEE, 2024: 865-875. paper.
Design Space Exploration
- Li Q, Tao J, Han J. SPARK: An automatic score-power-area efficient RISC-V processor microarchitecture SeeKer[J]. Microelectronics Journal, 2023. paper.
Dynamic Gesture Recognition
Zhang Y, Rong Y, Duan X, et al. An Energy-Efficient BNN Accelerator With Two-Stage Value Prediction for Sparse-Edge Gesture Recognition[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2023. paper.
Zhang Y L, Li Q, Zhang H, et al. A 28 nm, 397 μW real-time dynamic gesture recognition chip based on RISC-V processor[J]. Microelectronics Journal, 2021. paper.
Zhang Y L, Wang W Z, Li Q, et al. An Ultra-low-power High-precision Dynamic Gesture Recognition Coprocessor Based On RISC-V Architecture[C]//2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT). IEEE, 2020. paper.